This invention relates to a reference voltage generator used in a semiconductor integrated circuit.
Recently, elements in a semiconductor integrated circuit, especially in a dynamic RAM are being further miniaturized, with a result of lowering of a voltage suitable for deriving the transistor performance maximally. While, the power source voltage supplied to the dynamic RAM is not lowered. Therefore, an internal reduced-voltage generator is provided for lowering the voltage inside of the chip. In such a reduced-voltage generator, a reduced voltage based on a voltage generated at a reference voltage generator is supplied into the chip.
FIG.11 shows a conventional reference voltage generator (refer to Laid Open unexamined Japanese Patent Application No.63-244217). As shown in FIG.11, P-MOS transistors P100, P200 which are diode-connected from a power source V.sub.CC are provided in series at a first column and an N-MOS transistor N100 is connected in series between the P-MOS transistor P200 and a ground GND. At a second column, N-MOS transistors N300, N200 which are diode-connected from the ground GND are provided in series and a P-MOS transistor P300 is connected in series between the N-MOS transistor N200 and the power source V.sub.CC. The gate of the N-MOS transistor N100 and gate and drain of the N-MOS transistor N200 are connected to a node 200. The potential of the node 200 is the reference voltage V.sub.REF'. The gate of the P-MOS transistor P300 and gate and drain of the P-MOS transistor P200 are connected to a node 100. Accordingly, the output of the first column is inputted to the gate of the P-MOS transistor P300 via the node 100 to control the output of the second column and the output of the second column is inputted to the gate of the N-MOS transistor N100 via the node 200 to control the output of the first column, which is the feedback construction. For example, in FIG.11, the reference voltage output V.sub.REF' can be expressed by an equation (1), provided that all the MOS transistors are equal in gate length to one another and are operated in a saturation region. Wherein an absolute value of a threshold voltage of the P-MOS transistor is V.sub.TP, a mobility coefficient thereof is k'p, a threshold voltage of the N-MOS transistor is V.sub.TN, a mobility coefficient thereof is k'n, a gate width of the P-MOS transistor P300 is Wp, a gate width of the N-MOS transistor N100 is Wn, each gate width of the other MOS transistors is W, and a symbol * means multiplication. EQU V.sub.REF' =2*V.sub.TN *(1+2*(Wp*Wn/W.sup.2).sup.0.5)+2*(Wp*k'p/(W*k'n)).sup.0.5 *V.sub.TP( 1)
As indicated in the equation (1), the reference voltage output V.sub.REF' can set according to the gate width of each transistor, depends on the threshold voltages of the MOS transistors and is independent from the source voltage V.sub.CC. Also, the reference voltage V.sub.REF' can set according to the gate length (not indicated in the equation (1)). The condition for operating all the MOS transistors in the saturation region is that the power source voltage (V.sub.CC)&gt;the set reference voltage output (V.sub.REF')-V.sub.TN +2*V.sub.TP, so that the reference voltage output V.sub.REF' is constant with reference to the power source voltage V.sub.CC.
In this way, the conventional reference voltage generator which easily determines the reference voltage according to the transistor size, using the threshold voltages of P-type and N-type MOS transistors, is independent from the power source voltage in a large range of the power source voltage but fairly depends on temperature. In detail, the threshold voltage of each of P-type and N-type MOS transistors which is to be the reference of the reference voltage generation depends on temperature and the absolute value thereof drops at high temperature. Therefore, as cleared from the equation (1), the reference voltage output V.sub.REF' drops at high temperature. Such the state is shown in FIG.12, which is a result of actual measurement of the conventional circuit manufactured. As cleared from the drawing, 3.30 V reference voltage output at 25.degree. C. deviates to 3.15 V at 100.degree. C. which means O.15 V (4.5%) drop to 75.degree. C. temperature change. Such the temperature dependency involves problems of lowering of the device speed at high temperature and increase of current consumption of the device at low temperature.